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Reduced instruction set computing
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Reduced instruction set computing
Reduced instruction set computing
, or
RISC
(pronounced 'risk'), is a
CPU design
strategy based on the insight that a simplified
instruction set
(as opposed to a complex set) provides higher performance when combined with a
microprocessor architecture
capable of executing those instructions using fewer
microprocessor cycles per instruction
. A computer based on this strategy is a
reduced
instruction set
computer
, also called
RISC
. The opposing architecture is called
complex instruction set computing
, i.e. CISC.
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