Electronic system level (
ESL) design and verification is an emerging electronic design methodology that focuses primarily on the higher abstraction level concerns. The term
Electronic System Level or
ESL Design was first defined by
Gartner Dataquest, an EDA-industry-analysis firm, on February 1, 2001. It is defined in the
ESL Design and Verification book as: "the utilization of appropriate abstractions in order to increase comprehension about a system, and to enhance the probability of a successful implementation of functionality in a cost-effective manner."